![]() ![]() Multiple FPGA configuration daisy-chains The traditional solution for a remotely updatable FPGA involves a flash memory that has reserved areas within the main flash memory array to store these components:.Traditional Solution for Remote Update Compatibility with several configuration options, including:.XAPP1081 (v1.3) Ma1 Traditional Solution for Remote Update All other trademarks are the property of their respective owners. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. Quick configuration time for either the update bitstream or golden bitstream © Copyright 2013–2014 Xilinx, Inc.Built-in remote update error recovery/fallback to a known good or “golden” bitstream.Simple programmer interface protocol for payload delivery.Minimal remote update payload size approximately the size of a standard bitstream. ![]() HDL-based flash programmer reference design.Features Key features of the QuickBoot method include: See QuickBoot Reference Design Implementation Guide, page 14 to start implementing the QuickBoot reference design in an FPGA. See KC705 Board Demonstrations, page 33 to run the QuickBoot demonstrations on the KC705 evaluation board. Demonstration implementations of the QuickBoot method are provided for the KC705 evaluation board using the serial peripheral interface (SPI) flash or byte-wide peripheral interface (BPI) flash. X-Ref Target - Figure 1 Deployed System New/Enhanced FPGA Bitstream FPGA Flash Memory (Non-volatile Bitstream Storage) Remote Update Channel Configuration FPGA Bitstream (e.g., Ethernet, PCIe, USB, etc.) or Media Bitstream Update (e.g., USB Memory Stick, SD Card, etc.) X1081_01_040413 Figure 1: System With Remote Update Capability This application note presents detailed descriptions of the QuickBoot method that are important for evaluating the QuickBoot solution and debugging implementation problems. Introduction Figure 1 shows the architecture of a system with remote FPGA update capability. Together, the solution is referred to as the QuickBoot method. This application note provides a solution that enables a reliable field update through a complementary combination of a fast, robust configuration method and an efficient HDL-based, in-system programming reference design. This feature enables deployed systems to be updated with design patches or enhanced functionality. Application Note: 7 Series FPGAs QuickBoot Method for FPGA Design Remote Update XAPP1081 (v1.3) MaSummary Author: Randal Kuramoto A primary advantage of an All Programmable FPGA is its remote update capability. ![]()
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